1. Field of the Invention
The present invention generally relates to a semiconductor inspecting method for inspecting a semiconductor integrated circuit device. More particularly, the present invention relates to a semiconductor inspecting method using a semiconductor inspecting apparatus.
2. Description of the Background Art
The semiconductor integrated circuit devices are subjected to evaluation test before shipment using a semiconductor inspecting apparatus, so that only the non-defective products are shipped.
FIG. 16 is a block diagram showing the schematic structure of a conventional semiconductor inspecting apparatus.
Referring to FIG. 16, the semiconductor inspecting apparatus 1 includes a main body 10 and a general-purpose board 20.
The general-purpose board 20 is connected to the main body 10 through connectors 70. The general-purpose board 20 is mounted for signal transmission between the main body 10 and a semiconductor integrated circuit device 50 to be inspected.
Each pad 31 of a socket board 30 is connected to the general-purpose board 20 through a coaxial cable 60. The general-purpose board 20 and the socket board 30 are replaced according to the type of the semiconductor integrated circuit device 50 to be inspected.
The semiconductor integrated circuit device 50 to be inspected (hereinafter, sometimes referred to as inspected device 50) is connected to the socket board 30 through an IC (integrated circuit) socket 40. The IC socket 40 electrically connects input/output (I/O) pins of the inspected device 50 to the pads 31.
The semiconductor inspecting apparatus 1 transmits a plurality of test pattern signals to the inspected device 50 as write signals. The inspected device 50 outputs read signals according to the write signals. The main body 10 receives the read signals from the inspected device 50 and determines whether the inspected device 50 is defective or not.
In recent years, rapid response to external circuit devices has been required for the semiconductor integrated circuit devices. In particular, a higher frequency has been increasingly used for the synchronous semiconductor integrated circuit devices operating in synchronization with an external clock signal. As a result, AC (alternating current) parameter values such as setup time, hold time and access time of the external clock signal and each control signal have been increasingly reduced.
Such an increased response speed of the semiconductor integrated circuit device requires that the semiconductor inspecting apparatus be capable of receiving and determining a high-frequency signal and also accurately adjusting the difference in timing of applying each signal to the inspected device (hereinafter, such a difference is referred to as skew).
One method for adjusting the skew is to adjust the skew on a pin-by-pin basis of the IC socket by using an oscilloscope and a reference comparator in order to accurately adjust the timing at the IC socket end connected to the semiconductor inspecting apparatus and the inspected device. In another method, pins of IC sockets are short-circuitted with each other, and delay difference of signals flowing between each of the short-circuitted pins is measured and adjusted by the semiconductor inspecting apparatus. The information on the adjustment result of such methods is stored in the semiconductor inspecting apparatus for use in semiconductor inspection.
Such skew-adjusting methods have variation in accuracy due to the difference between the environment upon adjusting the skew and the environment upon inspection. For example, if the ambient temperature of the semiconductor inspecting apparatus upon adjusting the skew is different from that upon inspection, characteristics of the circuitry within the semiconductor inspecting apparatus such as a timing generation circuit are varied.
One countermeasure against such variation in accuracy due to the environment is to use a cooling mechanism for circulating a liquid retained at an approximately constant temperature around the main circuitry in the semiconductor inspecting apparatus such as the timing generation circuit. This prevents temperature rise resulting from the effects of the ambient temperature of the semiconductor inspecting apparatus and the heat generated by the main circuitry itself in the semiconductor inspecting apparatus, thereby enabling accurate inspection by the semiconductor inspecting apparatus.
However, the aforementioned skew adjusting methods complicate the circuit structure of the semiconductor inspection apparatus, resulting in increased costs of the semiconductor inspection apparatus.
It is an object of the present invention to provide a semiconductor inspecting method capable of easily suppressing the delay difference between a plurality of signals output from a semiconductor inspecting apparatus.
According to one aspect of the present invention, a semiconductor inspecting system for inspecting a semiconductor integrated circuit device includes: a semiconductor inspecting apparatus; a socket board for mounting the semiconductor integrated circuit device thereon for inspection; and an auxiliary inspecting apparatus mounted on the socket board. The auxiliary inspecting apparatus includes a receiving circuit for receiving a plurality of write signals from the semiconductor inspecting apparatus, a timing adjustment circuit for adjusting timing of the plurality of write signals, an output circuit for outputting the write signals adjusted by the timing adjustment circuit to the semiconductor integrated circuit device, and an input/output (I/O) terminal for receiving and outputting the write signals.
Thus, timing adjustment of the write signals can be conducted in the auxiliary inspecting apparatus. This enables suppression of the delay difference between the write signals that are applied to the semiconductor integrated circuit device.
Preferably, the auxiliary inspecting apparatus further includes a determination circuit for determining whether a signal output from the semiconductor integrated circuit device in response to each write signal is a prescribed signal or not.
Thus, the determination can be made before the delay difference is produced between the signals output from the semiconductor integrated circuit device, thereby improving semiconductor inspection accuracy.
Preferably, the auxiliary inspecting apparatus is included in another semiconductor integrated circuit device having a same specification as that of the semiconductor integrated circuit device.
This enables one of the semiconductor integrated circuit devices to be used as an auxiliary inspecting apparatus in order to inspect a semiconductor integrated circuit device of a new standard. This eliminates the need to fabricate an additional auxiliary inspecting apparatus according to change in standard of the semiconductor integrated circuit device.
Preferably, the semiconductor inspecting system further includes an IC (integrated circuit) socket. The auxiliary inspecting apparatus is included in the IC socket. The IC socket includes a spring for enabling electric connection between the I/O terminal of the auxiliary inspecting apparatus and a corresponding I/O terminal of the semiconductor integrated circuit device. The semiconductor integrated circuit device is connected to the socket board through the IC socket.
This facilitates replacement of the semiconductor integrated circuit device. This also facilitates replacement of the auxiliary inspecting apparatus in the case of a failure.
According to another aspect of the present invention, a semiconductor inspecting system for inspecting a semiconductor integrated circuit device includes: a semiconductor inspecting apparatus; a socket board for mounting the semiconductor integrated circuit device thereon for inspection; and an auxiliary inspecting apparatus mounted on the socket board. The auxiliary inspecting apparatus includes a pattern generation circuit for generating a plurality of write signals, a determination circuit for determining whether a signal output from the semiconductor integrated circuit device in response to each write signal is a prescribed signal or not, and an input/output (I/O) circuit for outputting the write signals to the semiconductor integrated circuit device, outputting the determination result of the determination circuit to the semiconductor inspecting apparatus, and receiving the signals output from the semiconductor integrated circuit device.
Thus, the auxiliary inspecting apparatus outputs the write signals and determines the semiconductor integrated circuit device. By mounting the auxiliary inspecting apparatus near the semiconductor integrated circuit device, the delay difference between the write signals can be suppressed. Moreover, since the auxiliary inspecting apparatus determines the semiconductor integrated circuit device, semiconductor inspection accuracy is improved.
According to still another aspect of the present invention, a semiconductor inspecting method for inspecting a semiconductor integrated circuit device using a semiconductor inspecting system including a semiconductor inspecting apparatus and an auxiliary inspecting apparatus includes the steps of: mounting the auxiliary inspecting apparatus and the semiconductor integrated circuit device on a same socket board; outputting a plurality of write signals from the semiconductor inspecting apparatus to the auxiliary inspecting apparatus; adjusting timing of the plurality of write signals by the auxiliary inspecting apparatus; and receiving the adjusted signals by the semiconductor integrated circuit device.
Thus, timing adjustment of the write signals can be conducted in the auxiliary inspecting apparatus. This enables suppression of the delay difference between the write signals that are applied to the semiconductor integrated circuit device.
Preferably, the semiconductor inspecting method further includes the steps of: outputting a signal from the semiconductor integrated circuit device in response to each write signal; receiving the signal from the semiconductor integrated circuit device by the auxiliary inspecting apparatus; and determining by the auxiliary inspecting apparatus whether the signal output from the semiconductor integrated circuit device is a prescribed signal or not.
Thus, the determination can be made before the delay difference is produced between the signals output from the semiconductor integrated circuit device, thereby improving semiconductor inspection accuracy.
Preferably, the step of mounting the auxiliary inspecting apparatus and the semiconductor integrated circuit device on the same socket board includes the steps of (a) mounting the auxiliary inspecting apparatus on one surface of the socket board, and (b) mounting the semiconductor integrated circuit device on the other surface of the socket board. In the steps (a) and (b), an I/O terminal of the auxiliary inspecting apparatus is connected to a corresponding I/O terminal of the semiconductor integrated circuit device via a through hole.
Thus, the wirings required on the socket board can be minimized, enabling suppression of the signal delay difference resulting from the wiring length.
Preferably, the step of mounting the auxiliary inspecting apparatus and the semiconductor integrated circuit device on the same socket board includes the steps of connecting the auxiliary inspecting apparatus to the socket board through an IC socket, and connecting the semiconductor integrated circuit device to the socket board through an IC socket.
This facilitates replacement of the auxiliary inspecting apparatus or the semiconductor integrated circuit device.
Preferably, the step of mounting the auxiliary inspecting apparatus and the semiconductor integrated circuit device on the same socket board includes the step of (c) connecting the semiconductor integrated circuit device to the socket board through an IC socket including the auxiliary inspecting apparatus. In the step (c), an I/O terminal of the semiconductor integrated circuit device is connected to a corresponding I/O terminal of the auxiliary inspecting apparatus included in the IC socket.
This facilitates replacement of the semiconductor integrated circuit device. This also facilitates replacement of the auxiliary inspecting apparatus in the case of a failure.
According to yet another aspect of the present invention, a semiconductor inspecting method for inspecting a semiconductor integrated circuit device using a semiconductor inspecting system including a semiconductor inspecting apparatus and an auxiliary inspecting apparatus includes the steps of: outputting a test pattern from the auxiliary inspecting apparatus to the semiconductor integrated circuit device; outputting a signal from the semiconductor integrated circuit device in response to each write signal; receiving the signal from the semiconductor integrated circuit device by the auxiliary inspecting apparatus; determining by the auxiliary inspecting apparatus whether the signal output from the semiconductor integrated circuit device is a prescribed signal or not; and transmitting the determination result from the auxiliary inspecting apparatus to the semiconductor inspecting apparatus.
Thus, the auxiliary inspecting apparatus outputs the write signals and determines the semiconductor integrated circuit device. By mounting the auxiliary inspecting apparatus near the semiconductor integrated circuit device, the delay difference between the write signals can be suppressed. Moreover, since the auxiliary inspecting apparatus determines the semiconductor integrated circuit device, semiconductor inspection accuracy is improved.
According to a further aspect of the present invention, a semiconductor inspecting method for inspecting a semiconductor integrated circuit device using a semiconductor inspecting apparatus includes the steps of: (d) mounting on one surface of a socket board of the semiconductor inspecting apparatus the semiconductor integrated circuit device to be inspected; (e) mounting another semiconductor integrated circuit device on the other surface of the socket board, the another semiconductor integrated circuit device having a same specification as that of the semiconductor integrated circuit device and having been determined as non-defective; (f) outputting a plurality of write signals from the semiconductor inspecting apparatus to the semiconductor integrated circuit devices; and (g) receiving by the semiconductor inspecting apparatus a power supply current flowing through the semiconductor integrated circuit device in response to the write signals.
By using as a reference sample the semiconductor integrated circuit device having been determined as non-defective by inspection, accurate inspection can be conducted in a more simplified manner.
Preferably, the steps (d) and (e) include the step of connecting the semiconductor integrated circuit devices to the socket board through an IC socket.
This facilitates replacement of the semiconductor integrated circuit device.
According to the present invention, the auxiliary inspecting apparatus is mounted near the device to be inspected, and timing adjustment of the write signals is conducted in the auxiliary inspecting apparatus. This facilitates suppression of the signal delay difference resulting from the impedance of coaxial cables.
A non-defective inspected device may be used as a reference sample instead of the auxiliary inspecting apparatus. In this case as well, the signal delay difference can be easily suppressed.
The foregoing and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.